At Hot Chips 2023, Intel revealed details about its upcoming 144-core Xeon Sierra Forest and Granite Rapids processors. The Sierra Forest processor is made up of Intel’s new Sierra Glen E cores, while the Granite Rapids processor uses Intel’s new Redwood Cove P cores. These next-generation Xeon chips will launch in the first half of next year with a new tile-based architecture. This design allows Intel to create multiple products based on different core types while maintaining the same basic configuration.
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Sierra Forest and Granite Rapids processors will be compatible with the Birch Stream platform, offering a simplified hardware validation process. They are also interoperable with the same software stacks, allowing customers to choose whichever chip best suits their needs.
Intel claims that the next-generation Xeon Sierra Forest design based on the E-Core core will deliver up to 2.5x better rack density and 2.4x higher performance per watt than fourth-generation Xeon chips. The P-Core-powered Granite Rapids will deliver 2 to 3x better performance on mixed AI workloads, in part due to improved memory bandwidth of “up to” 2.8x.
Sierra Forest and Granite Rapids Architecture
Intel first moved to a tile-based architecture with its fourth-generation Xeon Sapphire Rapids processors, but the new Sierra Forest and Granite Rapids processors bring a new level of separation to the approach. These new processors completely separate certain I/O functions into two separate HSIO chiplets etched into the Intel 7 process, while the CPU cores and memory controllers reside in their own dedicated compute chiplets.
The compute chips will use either Redwood Cove P-cores for Granite Rapids or Sierra Glen E-cores for Sierra Forest. The compute chiplets come with the EUV-enabled Intel 3 process that features high-density libraries. Intel initially delayed the Granite Rapids Xeons from 2023 to 2024 due to the design change from “Intel 4” to “Intel 3,” but the chips remain on schedule for release in the first half of 2024.
Granite Rapids is a traditional Xeon processor for data centers equipped only with P cores that can deliver the full performance of Intel's fastest architectures. Each P core has 2MB of L2 cache and 4MB of L3. Intel has not yet revealed the number of cores for Granite Rapids, but it did reveal that the platform supports from one to eight sockets in a single server.
Sierra Forest's E-core series consists of chips with lower-performance cores, positioning them to compete with Arm processors in the data center. E-Core-powered processors feature up to 144 cores and are optimized for power efficiency, space efficiency, and performance density. Each compute die contains the cores, L2 and L3 caches, as well as the fabric and caching home agent (CHA). They also house DDR5-6400 memory controllers at each end of the die.
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Compute chiplets will come in different sizes depending on the model, with single-compute-die products featuring a larger compute cluster. Intel will also vary the number of memory channels per compute chiplet. Compute dies share L3 cache with all other cores in what Intel calls a “logically monolithic grid,” but can also be divided into sub-NUMA clusters to optimize latency for certain workloads.
Combined, the two HSIO slots support up to 136 PCIe 5.0/CXL 2.0 lanes, up to 6 UPI connections, and compression, encryption, and streaming accelerators. Each HSIO slot also includes power control circuitry that manages the compute chiplets. Intel has now removed the requirement for a chipset (PCH), allowing the processors to be self-booting.
Intel Sierra Glen E-Core microarchitecture
The Sierra Glen microarchitecture is optimized for best-in-class performance in scalable workloads such as scale-out, cloud-native, and containerized environments. The architecture features clusters of two or four cores, allowing Intel to offer some models with more L2 cache per core and more performance per core (via higher power delivery for dual-core units). Each cluster of cores is in the same clock and voltage domain. The clusters share a 4MB L2 cache chunk and 3MB of shared L3 cache.
As with previous generations, each E-core is single-threaded. Intel has also doubled the L1 cache to 64KB and uses a 6-dimensional decode engine (doubled from 3-dimensional to improve latency and power consumption), 5-dimensional allocation, and 8-dimensional subtraction. The Sierra Glen cores do not support AMX or AVX-512, but are based on AVX10, but Intel has added support for BF16, FP16, AVX-IFMA, and AVX-DOT-PROD-INT8.
Intel Redwood Cove P-Core microarchitecture
The Redwood Cove architecture for P cores now supports AMX with FP16 acceleration, a key addition that will boost performance on AI inference workloads. Intel also doubled the L1 instruction cache capacity to 64 KB to better address code-intensive data center workloads. Redwood Cove also uses software-optimized prefetches and an improved branch prediction and error recovery engine. Intel also improved floating-point performance by moving from 4- and 5-cycle FP operations to 3 cycles, which boosts IPC.
Intel Xeon Roadmap
In good news for Intel, the company's data center roadmap remains on track. Sierra Forest will hit the market in the first half of 2024, with Granite Rapids following shortly after.
| 2023 | 2024 | 2025 | |
| Intel P-Core | Emerald Rapids – Intel 7 | Sapphire Rapids HBM | Granite Rapids – Intel 3 | Row 1 – Cell 3 |
| AMD P-Core | 5nm Genoa-X | Turin – Zen 5 | — |
| Intel E-Core | — | 1H – Sierra Forest – Intel 3 | Clearwater Forest – Intel 18A |
| AMD E-Core | 1H – Bergamo – 5nm – 128 Cores | — | — |
Here we can see what Intel's roadmap looks like next to AMD's data center roadmap. The current high-performance battle is between AMD's EPYC Genoa, which was released last year, and Intel's Sapphire Rapids, which was released earlier this year. Intel has its refreshed Emerald Rapids generation coming in the fourth quarter of this year, which the company says will feature more cores and faster clock speeds, and it has already released its HBM-enhanced Xeon Max CPUs. AMD recently released its 5nm Genoa-X products. Next year, Intel's next-generation Granite Rapids will go up against AMD's Turin.
On the efficiency front, AMD's Bergamo takes a very similar approach to the Sierra Forest core, leveraging AMD's dense Zen 4c cores. Bergamo is already shipping, while Intel's Sierra Forrest won't arrive until the first half of 2024. AMD's 5th-gen EPYC Turin chips are shipping before the end of 2024, but the company hasn't described the second-gen Zen 4c model. Intel now has the second-gen Clearwater Forest with E-core on its roadmap for 2025.
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information source:tomshardware.com
