Artificial intelligence “may well be the last technological revolution in human history,” Huawei’s rotating chairman, David Wang, said at Huawei Connect 2026 in Shanghai. His keynote address was titled “Advancing the Agentic World, Building a Solid Silicon Foundation.” Huawei spent three days showcasing the machines it hopes to use for this revolution.
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Most of the coverage focused on one sentence from that speech. Huawei’s next AI processor , the Ascend 960DT , will launch in the first quarter of 2027, three quarters earlier than originally planned. The 960PR, designed for inference, will follow in the third quarter. Wang also announced the Ascend 970 for 2028 and the Ascend 980 for 2029, attributing this regularity to the Tau Scaling Law.
The chip dates were just one item on a long list. Huawei also showed off an optical engine and two upgraded SuperPoDs, along with a memory storage cluster, a series of switches, and a cloud platform. All of this is connected by a new interconnect architecture.
The centerpiece is the Atlas 960E SuperPoD, which Huawei claims is the industry's first to use close-packed optics. One pod contains 4,096 NPUs and delivers 8 EFLOPS at FP8 precision, with up to one petabyte of HBM memory per pod.
Optics are important; Huawei has built its own close-packed optical engine, called Hi-ONE. Each module carries 7.2 Tbit/s and has an integrated light source. Deploying 5,500 of them removes 48,000 800G connected optical modules from the pod, reducing power consumption by more than 550 kilowatts and doubling the system’s uptime, increasing availability to 99.8%. The company has filed an implementation agreement for the technology with the Optical Internetworking Forum, a standards organization.
However, not all the numbers are in Huawei’s favor. TechCrunch pointed out a snag spotted by China tech analyst Rui Ma, who noted that Huawei had previously described an Atlas 960 SuperPoD that scales to 15,488 Ascend 960 chips, while the pod announced this week only contains 4,096. “The chip is coming MUCH earlier, but the SuperPoD they announced is much smaller than what they originally described,” Ma wrote.
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The per-chip gap with Nvidia hasn't closed either. The Register reports that the 960DT has up to 288GB of memory and four petaFLOPS of FP4, which is about half the FP8 and a third of the FP4 computing power of Nvidia's B300, which Nvidia can't sell in China.
Underneath all of this is UnifiedBus. Huawei has built an entire computing architecture around this interface. Yang Chaobin, who heads the ICT business group, said it integrates more than ten protocols into one, with bandwidth increasing from hundreds of gigabytes per second to terabytes, and latency decreasing from seven microseconds to two.
Yang also explained the reason for this effort. In a conventional 100,000 NPU cluster, only 20% of the computing power is used for the model, while the rest remains idle while moving data. The Huawei lab simulation compares two ways of building such a cluster, showing that pods of 4,000 NPU achieve 2.75 times the model FLOPs utilization compared to eight NPU servers.
Stacking pods leads to very large numbers. A two-layer, four-layer Clos network connects 512,000 NPUs, and a multi-lane topology increases that number to a million. However, Huawei has not built one, and The Register describes the million-NPU configuration as theoretical and not proven.
Huawei has also spent significant time on the developer scene. CANN serves Ascend in a similar way to how CUDA serves Nvidia. It has now transitioned to an open source community, with external developers making up 61% of the CANN community, surpassing its own developers for the first time.
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Ascend supports over 90 third-party open source projects and is now an official PyTorch backend accelerator, making it the first C.
