Computer memory architecture is set to undergo a major structural transformation in the coming years. A new design, known as Zero - Angle Memory (ZAM ), stacks chips vertically instead of laying them out flat, a change that could boost data transfer speeds while reducing power consumption. Intel has touted the technology as a potential replacement for its existing HBM memory .
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Samsung has begun shipping faster AI memory based on advanced process nodes with HBM4. Micron has revealed faster video memory that could feature in Nvidia RTX 6000 GPUs and has launched a 256GB SOCAMM2 using 64 32GB LPDDR5x, allowing hyperscalers to reach 2TB of capacity in an AI server.
Technical diagrams from an upcoming VLSI conference have revealed the internal details of the ZAM memory design. Eight separate DRAM storage layers lie beneath a single control layer in each ZAM module manufactured by the consortium. This arrangement gives each module a total of nine functional layers stacked vertically. Each of the eight DRAM layers contains exactly 1.125GB of storage capacity, providing about 9GB of total memory per ZAM module before any overhead deductions.
Three Through-Silicon Vias (TSVs) run across the entire vertical stack to electrically connect each layer from top to bottom. Intel developed the fusion bonding method that creates these TSV connections with extreme precision and reliability. Each DRAM layer is separated from its neighbor by a silicon substrate just 3 micrometers thick. These TSVs are connected by either two or three metal rings on each layer for consistent electrical current flow.
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Bandwidth estimates from previous statements now place ZAM close to the performance of HBM4 from Nvidia's Vera Rubin platform. A Japanese company, Saimemory Corporation , is leading the effort to commercialize this Intel-backed technology. Saimemory operates as a wholly owned subsidiary of SoftBank and has yet to release official speed data for this new memory design.
Previous statements from the company suggested a two to three times speedup over current HBM3 memory standards.
HBM3 currently provides 819 GBps of bandwidth in its base configuration, so a threefold increase from that base would give ZAM about 2.5 TBps of total throughput for AI processors. Nvidia's Vera Rubin AI platform is said to rely on HBM4 for the highest available bandwidth configurations. This performance parity puts Intel's HBM-killer memory technology in direct competition with Nvidia's preferred memory standard.
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At present, no working prototype of ZAM has yet been presented to independent reviewers or third-party testing labs.
